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Dual RF LDMOS Bias Controller with
Nonvolatile Memory
Interpolated Data = LUT [ ADD 1 ] + ? ?
Interpolated Data = LUT [ C 3 Hex ] + ? ?
ADC sample = 495 hex
<< x indicates a logical shift left by x number of bits.
>> x indicates a logical shift right by x number of bits.
1) LUT pointer = ADC sample >> (7 - PSIZE - INT)
= 495 hex >> (7 - 0 - 0)
= 495 hex >> 7
= 9 hex (9 decimal)
2) POFF = POFF << 0
= 001000 bin << 0
= 001000 bin
= 8 hex (8 decimal)
3) LUT pointer = LUT pointer + POFF
= 9 hex + 8 hex
= 11 hex (17 decimal)
4) Test LUT pointer is within the table size
Is 0 ≤ LUT pointer ≤ 31?
Yes, LUT pointer does not need limiting to table size.
LUT pointer = 11 hex (17 decimal)
5) EEPROM address = (SOT << 5) + LUT pointer
= (010 << 5) + 11 hex
= 40 hex + 11 hex
= 51 hex (81 decimal)
6) The LUT data at EEPROM address 51 hex is used
for the V GATE_ calculation.
LUT Pointer Example 2 (With Interpolation)
POFF = 101000 (offset of -24)
INT = 10 (linear interpolation required/LUT pointer has
2 fractional bits)
PSIZE = 10 (7-bit LUT pointer not including any frac-
tional bits)
TSIZE = 100 (LUT has 128 data locations)
SOT = 100 (LUT starts at EEPROM address 80 hex)
ADC sample = E6A hex
<< x indicates a logical shift left by x number of bits.
>> x indicates a logical shift right by x number of bits.
1) LUT pointer = ADC sample >> (7 - PSIZE - INT)
2) = E6A hex >> (7 - 2 - 2)
= E6A hex >> 3
= 1CD hex (461 decimal)
= 111001101 bin
= 1110011.01 bin in 7.2 fixed-point format
= 73.4 hex in 7.2 fixed-point format (115.25 decimal)
Since the LUT pointer is a fixed point fractional num-
ber with 7 integer bits and 2 fractional bits, the LUT
pointer value of 1CD hex is interpreted as 73.4 hex
(115.25 decimal).
3) POFF = POFF << 1
= 101000 bin << 1
= 1010000 bin
= D0 hex (-48 decimal)
4) LUT pointer = LUT pointer + POFF
= 73.4 hex (115.25 decimal) + D0 hex (-48 decimal)
= 43.4 hex (67.25 decimal)
5) Test LUT pointer is within the table size
Is 0 ≤ LUT pointer ≤ 127?
Yes, LUT pointer does not need limiting.
LUT pointer = 43.4 hex (67.25 decimal).
= (100 << 5) + LUT pointer
= 80 hex + 43.4 hex
= C3.4 hex (195.25 decimal)
The EEPROM address is a fixed-point fractional num-
ber (C3.4 hex), which falls between table entries at
address C3 hex and C4 hex. Linear interpolation is per-
formed between these two entries.
ADD1 = C3 hex (195 decimal)
ADD2 = C4 hex (196 decimal)
The interpolated data is calculated using ADD1 and
ADD2 and the corresponding data stored at these
address locations using the linear interpolation equation:
? EEPROM Address ? ADD 1 ?
? ADD 2 ? ADD 1 ?
x ( LUT [ ADD 2 ] ? LUT [ ADD 1 ])
? 195 . 25 ? 195 ?
? 196 ? 195 ?
x ( LUT [ C 4 Hex ] ? LUT [ C 3 Hex ])
Interpolated Data = LUT [ C 3 Hex ] + ( 0 . 25 ) x ( LUT [ C 4 Hex ]
? LUT [ C 3 Hex ])
where LUT[C3 hex] and LUT[C4] are the data values
stored at EEPROM addresses C3 hex and C4 hex.
Register Address Map
Table 6 lists the addresses for all of the 16-bit registers
that are accessible through the serial interface. To read
from and write to these registers, follow the proper SPI
or I 2 C read and write sequences described in the
Digital Serial Interface section. Bit C7 in the command
byte controls whether data is written to or read from the
register. This is not the same bit as the I 2 C read/write
44
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